Typical image sensors comprise an array of pixels. Each pixel has a capacitive node to collect electrical charge generated at an accumulation node when it is exposed to incident light, and its sensitivity to light variations from one image to another depends on the capacitance of this capacitive node. FIG. 1 shows the structure of two adjacent pixels Pi,j, of a typical array of pixels AP0. Pixel Pi,j belongs to a row of rank i, pixel Pi+1,j belongs to a row of rank 1+1, and both belong to a column Cj. Each pixel comprises a photosensor PS (or photodetector) embedded in a semiconductor substrate, an accumulation node N0 formed by the cathode of the photosensor, and a capacitive node N1 having a capacitance IC shown in dotted lines as a capacitor. The capacitive node N1 is coupled to the accumulation node N0 through a transfer transistor TT, to a voltage VS through a reset transistor RT, and to an output line CLj through a source-follower transistor FT and an output transistor OT. The source-follower transistor FT has a gate connected to the capacitive node N1, a drain receiving voltage VS, and a source connected to a drain of the output transistor OT, which has a source connected to the output line CLj.
In a typical embodiment of a method of capturing an image with such an array of pixels, the pixels are read on a row-by-row basis with overlapping row read cycles. All the pixels of a selected row (“current row”) are simultaneously read in one row read cycle comprising individual pixel read cycles. The pixels of the next row to be read (“next row”) are subject to read cycles that overlap the read cycles of the pixels of the current row with a determined time offset.
FIG. 2 is a timing diagram of three logic control signals TS, RS, OS involved in a pixel read cycle. Signal TS is a transfer signal applied to a gate of the transfer transistor TT. Signal RS is a reset signal applied to a gate of the reset transistor RT. Signal OS is a readout signal applied to a gate of the output transistor OT. Each control signal is, for example, set to 1 when the corresponding transistor is set in the conducting state (“ON” state), and is set to 0 when the transistor is to be blocked (“OFF” state).
The read cycle is performed between times t0 and t9, and comprises intermediate times t1, t2 . . . t8 corresponding to rising or falling edges of some of the control signals. Signal TS is set to 1 from t2 to t3 and from t7 to t8. Signal RS is set to 1 from t9 of the previous pixel read cycle to t1, from t4 to t6, and from t9 to t1 of the next pixel read cycle. Signal OS is set to 1 from t5 to t10. The read cycle may comprise the following steps: S1: First reset of the capacitive node N1 (from t9 of the previous read cycle to t1 of the current read cycle): The reset transistor RT is ON and node N1 is tied to voltage VS. T1: First transfer of charges (from t2 to t3): The transfer transistor TT is ON, and the reset transistor RT is OFF. Electrical charges accumulated by the photosensor at node N0 are transferred to node N1. A1: Charge accumulation (from t3 to t7): The transfer transistor TS is OFF and electrical charges are accumulated at node N0. S2: Second reset of the capacitive node N1 (from t4 to t6): The reset transistor RT is ON and node N1 is tied to voltage VS. C1: Connection of node N1 to the output line CLj (from t5 to t10): The output transistor OT is ON and the capacitive node N1 is coupled to the output line through transistors FT, OT. R1: First read of node N1 (from t6 to t7): Transistors RT and TT are OFF and transistor OT is ON. The voltage at node N1 is transferred to line CLj through transistors FT and OT, and is read (i.e. sensed) by peripheral means connected to this line (not shown) T2: Second transfer of charges (from t7 to t8): The transfer transistor TT is ON, and the reset transistor RT is OFF. Electrical charges accumulated at node N0 during step Al are transferred to node N1. R2: Second read of node N1 (from t8 to t9): The voltage at node N1 is transferred to line CLj through transistors FT and OT.
The voltage at the capacitive node N1 is thus read twice, once after the reset R1 and once after the transfer of charges T2, and is supplied to an image processing system for determination of a pixel data. It may happen that the lighting conditions present variations between extreme lighting conditions—from very bright lighting to very dark lighting—which are such that the capacitance of the capacitive node N1 is inappropriate for capturing an image in one of the extreme lighting conditions. If it has a small capacitance, the capacitive node N1 may not be able to receive all the electrical charges accumulated by node N0 in very bright conditions. Conversely, if it has a large capacitance, it may not be possible to differentiate small lighting variations in dark conditions since the voltage at node N1 varies too little from one transfer step to another to be properly sensed.
It may thus be desired to provide an image sensor with adjustable sensitivity, for improved functioning in both dark and bright lighting conditions. U.S. Patent Application Publication No 2008/0231727 discloses a method for adjusting the dynamic range of an image sensor on a pixel-by-pixel basis. The method may comprise integrating charges in a photodetector with the photodetector at a first capacitance, reading the resulting signal level at a first time with the photodetector at the first capacitance, changing the photodetector capacitance to a second capacitance, and reading the signal level associated with the photodetector at the second capacitance. To change the capacitance of the capacitive node, the node of a current pixel (pixel being read) is connected both to the capacitive node of a previous pixel (pixel previously read) and to the capacitive node of a next pixel (pixel to be read during a next pixel read cycle).
This method may be incompatible with overlapping read cycles since connecting the capacitive node of the current pixel (pixel being read) to the capacitive node of the next pixel (pixel to be read) prevents the next pixel from correctly performing the accumulation step due to crosstalk between photosensors. Even if its transfer transistor is OFF, the crosstalk may disturb the charge accumulation process of the next pixel when its capacitive mode is connected to the capacitive node of the current pixel.
In other respects, this method aims to extend the dynamic range of each pixel for a given image, by a real-time comparison of two voltage values corresponding to two capacitance values of the capacitive node, which amounts to extending the global dynamic range of the image sensor to accommodate large lighting variations within a single image. This may imply storing numerous voltage values for each pixel, two per capacitance value of the pixel, and post-processing of the voltage values to decide which one must be retained, thereby possibly necessitating powerful processing demands.